Abstract
Physical design (PD) within very-large-scale integration (VLSI) is complex, iterative, and time-consuming, featuring extended design cycles and requiring significant manual debugging that is heavily reliant on individual experience of the engineer. This disclosure describes techniques to model the entire PD lifecycle of a VLSI design as a conceptual graph by leveraging historical PD data. The conceptual graph can be employed to represent the entire design history as a directed acyclic graph (DAG). The DAG can help capture the cause-and-effect relationships between jobs with sequential edges representing stage transformations and iterative refinement edges documenting causes for re-runs. The DAG can be integrated within an analytics platform that utilizes machine learning techniques such as graph neural networks and large language models. The platform enables engineers to query the multi-run history of the design to understand the evolution of the design, perform root-cause analysis, and learn from past successes and failures. The platform can also implement automated analyses of the historical data captured within the DAG to identify non-obvious patterns, make predictions, and provide actionable recommendations. Analyses based on the complete lifecycle captured in the DAG can move beyond single-point predictions to make the PD process more effective and efficient.
Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.
Recommended Citation
Somani, Avijeet; Karandikar, Sagar; Ranganathan, Parthasarathy; and Jain, Akanksha, "Physical Design (PD) Modeled as a Directed Acyclic Graph (DAG) for Advanced Analytics", Technical Disclosure Commons, ()
https://www.tdcommons.org/dpubs_series/9097