Abstract
Standard security architectures utilize a Deterministic Random Bit Generator (DRBG) seeded by a True Random Number Generator (TRNG). The TRNG requires an initialization sequence for analog stabilization and health testing, which introduces a latency of 1 to 20 milliseconds. If a DRBG state is near a mandatory reseed interval at wake-up, a high-latency TRNG cold start is triggered, causing unpredictable system delays. This disclosure describes a method where a reseed operation is performed preemptively during the power-down sequence. A finite state machine evaluates the DRBG state upon a sleep request. If a reseed is required based on a configurable freshness threshold or policy, the acknowledgement to the power controller is withheld until the DRBG is reseeded using the already active TRNG. The refreshed state is then saved for retention. This approach promotes a deterministic wake-up latency of approximately 10 microseconds by moving high-latency maintenance tasks to the power-down phase.
Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.
Recommended Citation
Sinha, Rohit Kumar and Van den Berghe, Nicolas, "Preemptive Re-Seeding of a Deterministic Random Bit Generator for Reduced Wake-Up Latency", Technical Disclosure Commons, ()
https://www.tdcommons.org/dpubs_series/9450