Abstract
This publication describes handling simultaneous write requests from multiple processing pipelines to a single memory address without stalling. An atomic write-merge solution system (“system”) may resolve write-write hazards atomically within a single clock cycle, maintaining high throughput in parallel computing architectures. First, the system in a conflict detection stage may be configured to identify a group of pipelines targeting the identical memory address in the same cycle. Second, the system, in a self-indexing mechanism, may be configured to assign a unique, deterministic rank to each pipeline within the conflicting group. The deterministic rank may be calculated for each pipeline by counting how many other pipelines in the group have a lower physical index. Finally, the deterministic rank may be used to coordinate group actions, such as aggregating write data into a single atomic update and dispatching a variable number of completion signals (e.g., dma_done) in parallel. By comparing its assigned rank to the number of required completion signals, each pipeline can independently determine whether to transmit a signal, ensuring the correct number of signals are sent without redundant or missed operations.
Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.
Recommended Citation
N/A, "STALL FREE ATOMIC WRITE-MERGE SOLUTION VIA SELF-INDEXING", Technical Disclosure Commons, (October 31, 2025)
https://www.tdcommons.org/dpubs_series/8811