Abstract
Multiple network switches may be stacked, one atop another, and then interconnected through each switch’s two stack ports (SPs). Within such a stack arrangement, techniques are presented herein that support dynamically reducing the power utilization of a switch’s SP Serializer/Deserializer (SerDes) blocks without interrupting any data traffic. Under aspects of the presented techniques, a switch may transition between different power saving modes, which may include a normal mode (encompassing powering down the SerDes blocks of both of the switch’s SPs), an optimized mode (encompassing reducing the speed of the SP SerDes blocks), and a smart mode (encompassing dynamically powering up and down one of the switch’s SPs based on a budgeting of the network traffic). Under further aspects of the presented techniques, the selection of a power saving mode may be based on a switch’s configuration (such as a standalone arrangement, part of a half-ring topology, or part of a full-ring topology) and a switch’s input traffic bandwidth.
Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.
Recommended Citation
Ranjan, Amitabh; Rangaswamy, Rakesh Maduvinakodi; and Gupta, Girish Kumar, "DYNAMIC STACK PORT SERDES POWER UTILIZATION FOR A SUSTAINABLE DATA STACK", Technical Disclosure Commons, (October 18, 2023)
https://www.tdcommons.org/dpubs_series/6327