Abstract
A bridge-first manufacturing method is used to achieve high-density interconnectivity across logic chiplets and memory modules. Silicon bridge dies and tall copper pillars are positioned on a temporary carrier, such as glass, coated with a temporary release layer and encased within an epoxy molding compound. Following grinding of the molded panel to expose contact surfaces, substrate layers containing metallic conductive traces and dielectric layers are built directly on the backside of the bridge dies. Tall copper pillars extend vertically through the molding compound to serve as direct vertical power and signal highways without routing through the bridge dies. Frontside wiring layers convert the wider contact spacing of the tall copper pillars to fine micro-bump spacing for mounting top dies and high-bandwidth memory stacks using thermal compression bonding. The microelectronic units are cut and mounted onto a printed circuit board using ball grid arrays, after which the carrier is removed to expose bare silicon tops for thermal dissipation.
Keywords: microelectronic packaging, bridge-first integration, embedded silicon bridge, tall copper pillars, redistribution layer, coreless substrate, multichip module, chiplet assembly.
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This work is licensed under a Creative Commons Attribution 4.0 License.
Recommended Citation
N/A, "Bridge-First Semiconductor Packaging Architecture with Integrated Conductive Pillars and Direct Substrate Buildup", Technical Disclosure Commons, ()
https://www.tdcommons.org/dpubs_series/12340