Abstract
Reconfiguring a hardware accelerator through an operating system (OS) commonly costs microseconds, because kernel drivers, thread scheduling, and register‑level writes sit between the requesting program and the hardware. This disclosure describes a system in which a compiler backend embeds routing configurations in a metadata segment of an executable and an OS‑bypass bootstrapper maps those configurations and a doorbell into user space. A sideband control plane then carries a switch trigger to a reconfigurable co‑processor without a system call or an interrupt. Shadow configuration planes, resident at each routing node ahead of use, enable a context switch to travel across the co‑processor as a wave that follows packet boundaries, with a single‑cycle swap at each node. The system may reduce reconfiguration latency from the order of microseconds to nanoseconds, and the co‑processor can continue processing data throughout a switch.
Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.
Recommended Citation
Murphy, Jonathon, "Host‑to‑Fabric Context Switching Through Sideband Signaling and Wave‑Propagated Reconfiguration of a Coarse‑Grained Reconfigurable Array", Technical Disclosure Commons, (September 09, 2026)
https://www.tdcommons.org/dpubs_series/11679