Abstract
Physical design flows for a system on a chip (SoC) commonly resolve routing congestion with uniform placement or routing blockages. Such blockages can waste floorplan area and degrade timing on paths holding no spare slack. This publication presents a congestion mitigation method that resolves each congestion hotspot into one of three physical root causes and generates an engineering change order (ECO) matched to the cause found. A slack test protects timing, so a net with negative slack keeps a direct route while a clock latency adjustment borrows margin from a neighboring pipeline stage. Generated directives compile into a variable file and run as parallel place and route (PnR) branches. A multi-objective reinforcement learning (RL) reward scores each outcome, and repair selection can improve on later designs as the scores accumulate.
Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.
Recommended Citation
R, Kishore, "Routing Congestion Mitigation via Hotspot Root Cause Classification and Timing-Aware Engineering Change Orders in a Reinforcement Learning Loop", Technical Disclosure Commons, (September 09, 2026)
https://www.tdcommons.org/dpubs_series/11678