Abstract
The technology described in this paper relates to an approach for mitigating the issue of thermal warpage mismatch between high-performance processor packages and system boards by mechanically coupling a localized stiffener structure to a printed circuit board near the mounting area of a large-scale package. By selecting materials with tailored coefficients of thermal expansion, the localized stiffener actively influences the board's thermal warpage profile during solder reflow, forcing it to conform to the warpage shape of the package. This approach significantly reduces assembly defects, such as non-wet opens and bridging, particularly across massive ball grid array footprints. The disclosed technology represents a cost-effective and highly scalable alternative to full-board modifications, enabling high-yield assembly of next-generation packaging in advanced high-performance computing platforms.
Keywords: Circuit board warpage control, thermal expansion matching, localized stiffeners, dual-sided stiffener architecture, integrated thermal hardware anchoring.
Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.
Recommended Citation
N/A and , "Warpage Control of Printed Circuit Boards for Large-Scale Package Assembly Using a Localized Stiffener", Technical Disclosure Commons, ()
https://www.tdcommons.org/dpubs_series/11383