Abstract
In mixed-criticality computing systems, latency-critical services can be delayed when lower-priority tasks hold shared resource locks, causing a priority inversion. Software that performs aggregate-based power scaling responds more slowly to these events than hardware. This publication describes a service-aware power management architecture that utilizes synchronous lock interception and hardware-assisted thread profiling to resolve resource contention. An event-driven interceptor monitors synchronization primitives to detect when a critical task is blocked by a lower-priority thread. Before altering a power state of the lower-priority thread, however, the system queries hardware performance counters to verify that the blocking task is compute-bound rather than memory-stalled. If verified, the system bypasses periodic software polling and issues a “direct” hardware control message to boost the voltage or frequency of the lower-priority thread associated with the blocking task. This targeted hardware actuation accelerates release of the lock to reduce latency for critical or other higher-priority services while preserving energy and thermal efficiency.
Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.
Recommended Citation
Girish, Vadlamudi Venkata, "Service-Aware Dynamic Voltage and Frequency Scaling via Thread Attribution and Synchronous Lock Interception", Technical Disclosure Commons, (June 29, 2026)
https://www.tdcommons.org/dpubs_series/10595