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Abstract

The Fibonacci Global History Length (FIHL) Branch Predictor is a highly constrained hardware architecture designed to optimize speculative execution in deeply pipelined microprocessors. Operating within a strict 32-kilobit hardware budget, the FIHL architecture synthesizes the frameworks of perceptron learning and hash indexing while replacing traditional geometric history length progressions with the Fibonacci sequence. By natively mapping global history lengths to the Fibonacci sequence across six parallel branch history tables, the design efficiently correlates both highly localized instruction patterns and distant control-flow dependencies without the exponential memory footprint of traditional pattern history tables. Empirical evaluations across diverse workloads demonstrate that this mathematical alignment reduces the misprediction rate to an arithmetic mean of 5.285 MPKI. This yields a nearly 37% accuracy improvement over legacy tournament predictors, significantly minimizing pipeline flush penalties and dynamic power waste.

Creative Commons License

Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.

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