Inventor(s)

Nabeel ZafarFollow

Abstract

This disclosure describes apparatus and techniques to accelerate the testing of thermal interface materials (TIM) in electronic devices. Per the techniques, mechanical stresses induced by integrated circuit (IC) package warpage are simulated by applying a controlled and rapid thermal profile to either an electrically non-functional IC package assembly or to a multi-metal stack, both of which mimic the thermo-mechanical behavior of an actual package. By decoupling the mechanical stress study from electrical functionality, the techniques enable early-stage, cost-effective, and rapid evaluation of TIM pump-out and degradation. This test fixture allows different temperature/power cycle profiles (ramp rate and dwell times) to be tested which can be further used to characterize the performance of TIM under thermal loads (both magnitude and duration). The test apparatus includes a base fixture, a sample under test, and a top cooling system. The base fixture includes an active thermal control system, which includes a heat source, such as cartridge heaters or a hot liquid loop. In some implementations, the active thermal control system additionally includes an integrated cooling loop that may use water or another coolant.

Creative Commons License

Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.

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