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Abstract

This disclosure describes low-cost, energy-efficient lookup-table (LUT) multipliers using memory arrays with read-only memory or tie-off cells (cells hard-wired to a 0 or 1). In contrast to a typical SRAM cell, which can use up to six transistors, a latch, etc., a tie-off cell uses only a couple of transistors. The memory array can be shared among a number of multipliers. Sharing the memory array across multipliers amortizes the cost of the memory array over those multipliers. The tie-off cell LUT can be optimized using ‘constant propagation’ during synthesis. The read decoders can be further optimized for a given implementation with custom work.

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This work is licensed under a Creative Commons Attribution 4.0 License.

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