Abstract

Hardening secure integrated circuits such as security chips, processors, etc. against physical side-channel attacks is a complex task. Such hardening requires many iterations of design, and testing. Current countermeasures to mitigate side-channel leakage have significant overheads in terms of area, power, and/or performance. Moreover, such mechanisms may be ineffective against certain types of attacks and can potentially introduce new vulnerabilities. The mechanisms may be unsuitable in low-cost embedded systems with constraints on resources. This disclosure describes the use of a memory-mapped IP block that acts as a source or a sink for memory operations for out-of-range memory addresses. The block can reside as a peripheral on the common bus or can be a part of the memory controller. When a read operation on an out-of-range address is performed, the IP block returns a pseudo-random value. When a write operation to an out-of-range address is performed, the IP block sinks all writes, mimicking the behavior of actual memory that can be observed externally.

Creative Commons License

Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.

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