HP INCFollow


The objective of this idea is to describe a new solution using castellated PCB technology to manage small signal and power requirements in a single module at the same time, minimizing the module PCB size by adjusting each path to its power requirements. This module will act like a PCB class changer reducing the costs and complexity on the big PCB areas where those kinds of modules are going to be used.

This new design reduces the PCB size when power management pins are required together with large amount of GPIO control pins on the same castellated module. Using all pins with the same size, the total area required is specified by the maximum power pin size multiplied by the total of pins required (power and control).

Typical applications for the castellated technology are found for uControllers, FPGA, and other small signal functions but not mixed with power.

Creative Commons License

Creative Commons License
This work is licensed under a Creative Commons Attribution-Share Alike 4.0 License.