Abstract

This disclosure is to design a decoupling capacitor topology of IC’s in PCB layout to

effectively resolve EMI problem with minimum number of capacitors. The proposed

decoupling capacitor topology is to simulate the twisted wire principle which the

common mode ground noise is cancelled at ground when 2 current loops are in opposite

direction.

Determine the location of decoupling cap, we can control the current direction of the

IC’s since the decoupling cap would be the power source to the IC’s. By controlling the

current direction of 2 IC’s with opposite direction the common mode ground noise

would be cancelled at ground.

The proposed topology is to let decoupling capacitor located between the 2 IC’s. The

current flow for the 2 IC’s would start from the decoupling cap and end at the ground of

IC then back to the ground pin of cap. Current flow direction to first IC would start from

the right and the current flow direction to the other IC would start from the left. With

the opposite current direction, the magnetic flux of both of IC’s would have been

cancelled each other at ground.

Creative Commons License

INC, HP, "EMC COMPONENT OPTIMIZATION", Technical Disclosure Commons, (November 20, 2020)
https://www.tdcommons.org/dpubs_series/3796

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