Abstract
A silicon interposer is a widely used communications channel, or interconnect, between dies of integrated circuits. When used to connect high-speed application-specific integrated circuits (ASICs) and high-bandwidth memories (HBM), the traditional three-metal layered silicon interposer suffers from excessive insertion loss, cross-talk, and inter-symbol interference. Communications at the requisite speed, e.g., 3 Gbps or more, is unfeasible.
This disclosure describes techniques of optimal dimensioning and placement of traces within a five-metal layered silicon interposer to achieve a robust interposer communications channel with low insertion loss, cross-talk, and inter-symbol interference. ASIC-HBM communications speed of up to 3.6 Gbps is supported with use of the described interposer.
Creative Commons License
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Recommended Citation
N/A, "A Five-metal Layered High-Speed Silicon Interposer with Low Insertion Loss and Cross-Coupling", Technical Disclosure Commons, (August 03, 2020)
https://www.tdcommons.org/dpubs_series/3483