Abstract
On Intel platform that is supporting Switchable/Hybrid Graphics feature, a discrete
GPU can be connected to either PCIe Graphics interface (PEG) inside CPU or PCIe
controller inside PCH. The maximum link width is up to 16 lanes (x16) on PEG. But
the maximum link width is up to 4 lanes (x4) per one PCIe controller on PCH.
For both AMD and Nvidia graphics cards, the PCIe link width can support x8 or x16
lanes. However, if a discrete graphics card is designed behind PCH PCIe controller,
the PCIe link width is limited to x4 lanes on system.
SBIOS provides setup options to enable/disable certain PCIe devices, such as Intel
Thunderbolt devices, WLAN, WWAN and USB3 ports. Once these PCIe devices are
disabled, these free PCIe lanes can be used by discrete GPU ideally.
With De-Mux PCIe switching solution, SBIOS can use GPIO to control output PCIe
lanes to either Discrete GPU or other PCIe devices. So PCIe lanes can be fully
utilized on discrete GPU when certain PCIe devices are disabled.
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Recommended Citation
INC, HP, "FLEXIBLE PCI EXPESS BANDWIDTH EXTENSION ON EMBEDDED DISCRETE GPU", Technical Disclosure Commons, (June 24, 2020)
https://www.tdcommons.org/dpubs_series/3359