Abstract
A late-stage engineering change order (ECO) inserts coupled logic cells into a routed system-on-a-chip layout. Conventional electronic design automation (EDA) placers drop each ECO cell at a static wirelength centroid that disregards unplaced sibling ECO cells and the density, congestion, and power of the surrounding tiles. To address these challenges, this disclosure describes a hybrid ECO placement method that separates the choice of which ECO cell to place next from the search for where to place it. A priority-ordering stage ranks the unplaced ECO cells by timing urgency, anchor readiness (the share of connected fixed cells already in place), and coupling to other unplaced ECO cells. A spatial striding stage then moves each ranked cell in sub-micron steps across a continuously updated floorplan state toward the position that minimizes a combined timing, congestion, and power cost. A multi-pass loop repeats both stages and re-places every cell using the positions from the prior pass. The method can recover post-route slack and can reduce ECO-induced hotspots, wirelength, and congestion.
Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.
Recommended Citation
Sharma, Vaishali and Sharma, Sandipan, "Multi-Pass Placement of Engineering Change Order Cells by Priority Ordering and Spatial Striding over a Live Floorplan State", Technical Disclosure Commons, (November 09, 2026)
https://www.tdcommons.org/dpubs_series/12835