Abstract
The disclosure describes techniques to execute high-throughput MXINT8 dot products in a tensor-core datapath without adding a proportional number of dedicated 8-bit-by-8-bit integer multipliers. In one embodiment, an 8b×8b MXINT8 product is decomposed into multiple 4b×4b nibble partial products computed by an existing low-precision multiplier array used for MXFP8/MXFP6 modes. The partial products are weighted by shifts and combined using existing adder-tree datapaths, optionally split across parallel adder networks and merged in a later stage. Only steering, operand slicing, and shift/weight logic is added while preserving exact integer algebra through early stages and confining any rounding to an existing later alignment/truncation stage. The approach also extends to mixed MXINT8×MXFP6 multiplication using a two-term decomposition.
Creative Commons License
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Recommended Citation
Anonymous, "Area-Efficient MXINT8 Dot-Product Execution by Reusing Low-Precision Multiplier and Adder-Tree Logic in a Tensor Core", Technical Disclosure Commons, ()
https://www.tdcommons.org/dpubs_series/12565