Abstract
1. Four-level direct transmit by per-symbol map writes. With the direct data input held at 0, the four settings of the modulator's symbol-map field put the symbol 00 on -1, +1, -3 and +3. The modulator's control word is rewritten once per symbol from a RAM ring by DMA, each write placed by a hardware timer that every edge of the radio's bit clock (DCLK) restarts. Bit-exact at 1 and 2 Mb/s on two parts; 21-23 µs (1 Mb/s) and 11.3 µs (2 Mb/s) from register to receiver output.
2. Host-fed version. The host shifts two bits per symbol, clocked by DCLK, into a serial port of the radio's processor, which writes the control words a few symbols ahead of the DMA.
3. Shaped sample-table transmit. The radio's sample-stream mode is fed from a 64-entry table of Gaussian-shaped samples built from the PHY's own taps.
4. Gated-clock FIFO bridge. A serial clock phase-locked to the radio crystal 300 ppm above the air rate, paused at byte boundaries, gives the host a clock and data pair from the FIFOs: bit-exact, 107-136 µs, no sensitivity cost.
5. Hardware receive output: the packet-trace interface routed to general pins.
6. Shaping verified on every transmit path by an RSSI sweep with an unshaped control.
7. A narrow four-level PHY (h 0.25, BT 0.5, receive filter 1.2 MHz): 1.30 MHz declared bandwidth, 3 audio channels per MHz.
8. Watchdog transmit stop armed per transmission.
Creative Commons License
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Recommended Citation
Anonymous, "Four-level FSK direct transmit on a transceiver that has none, by rewriting its symbol-map register once per symbol on a timer started by the radio's own bit clock; continuous shaped transmit from a sample table; a gated-clock FIFO bridge; a narrow four-level PHY; and a watchdog transmit stop, for a continuous low-latency audio stream", Technical Disclosure Commons, (October 20, 2026)
https://www.tdcommons.org/dpubs_series/12322