Abstract

Dynamic IR-drop, a voltage drop reflecting current (I) through resistance (R), has become a significant operational constraint in the power delivery network (PDN) of an integrated circuit.  A transient matrix solver can take upwards of 6-12 hours to verify one engineering change order (ECO).  Separately, a frame-based neural network may miss voltage deficits that build across consecutive clock cycles.  To address these limitations, this a prediction method feeds per-cycle power tensors through a shared spatial encoder.  From there, a convolutional long short-term memory (ConvLSTM) temporal core carries voltage history from cycle to cycle.  A shared spatial decoder then reconstructs a transient voltage map for each cycle, and a temporal max-pooling stage extracts a worst-case peak IR-drop map.  An asymmetric quantile loss weights under-prediction more heavily than over-prediction during training.  The method can reach a root-mean-square error (RMSE) near 6.70 mV in about 29 seconds and can serve successive ECOs without retraining.

Creative Commons License

Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.

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