Abstract

This disclosure relates to the field of processor power management and electrical protection in mobile computing systems. A system control technique is disclosed that uses a dynamically pulsed PROCHOT signal to communicate proportional power reduction requirements to processor management logic. The duty cycle of the pulsed signal is adjusted according to the relationship between platform power demand and available battery power capability. In conventional systems, an infrastructure protection event may cause a PROCHOT signal to be asserted continuously. A continuously asserted signal is typically interpreted as a request for aggressive throttling. Processor frequency may therefore be reduced to a minimum operating level even when some electrical headroom remains available. Other power management approaches may consider processor, voltage regulator, or thermal limits, but may not directly correlate the external throttling request with available battery capability. During a transition between external power and battery power, this can create two undesirable results. The system may reduce performance more than necessary, or it may fail to reduce power quickly enough to avoid a battery over-current protection event. The disclosed technique replaces continuous assertion with a pulsed PROCHOT waveform. The active duty cycle of the waveform represents the requested severity of power reduction. A smaller active duty cycle represents a less restrictive limit. A larger active duty cycle represents a more restrictive limit. This allows the system controller to request a continuum of processor performance limits instead of only a fully asserted or fully de-asserted state.

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Creative Commons License
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