Abstract

Existing data processing systems universally adopt a centralized computing paradigm that relies on
complex operations, resulting in high computational resource consumption and significant bandwidth
redundancy. This paper proposes a data processing method, system, and hardware apparatus based on a
Pipeline Array, wherein input data is distributed across multiple independent Pipelines. Each Pipeline
independently maintains a state value, compares the input against its state, outputs upon change, Blocks
when unchanged, and independently updates its state value. Founded on the Zero-Computation Property
(core operations are comparison and assignment only), the system comprises Pipeline, State Storage,
Compare, Output Control, and State Update modules. The hardware Pipeline unit consists of a
Comparator, register, and Output Switch (Tri-state Gate), integratable into FPGA, ASIC, optical/quantum
computing chips, memristor arrays, and other platforms. The architecture inherently possesses
Spatiotemporal Intrinsic Properties and is isomorphic with Spiking Neural Networks. Derived capabilities
in network communication, AI inference, and hardware acceleration are investigated. Experiments
demonstrate that under static scenarios Data Output approaches zero; in video (5% Change Rate) and IoT
(0.1% Change Rate) scenarios output is reduced by 95% and 99.9% respectively; per-Pipeline latency is
~0.41μs and throughput reaches 2.4M Pipelines/second at 64K scale.

Creative Commons License

Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.

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