Abstract
A wireless radio buffers packets received from a low-power processor over a lower-throughput host interface while keeping radio-frequency (RF) hardware in a low-power state. Firmware on the wireless radio detects a first packet arrival and starts a single-shot aggregation timer. Subsequent packets received during the timer interval are accumulated in a local buffer without powering the RF hardware. When the timer expires, the firmware activates RF circuitry and transmits the accumulated packets as a high-throughput over-the-air burst. After the burst, the aggregation timer is not re-armed, allowing later packets to be transmitted without added aggregation delay. The timer duration may be configured based on expected transfer size and host-interface throughput, including per-transfer control messages from the low-power processor, and the radio may return to idle using an existing inactivity timer.
Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.
Recommended Citation
Anonymous, "Power-Efficient Packet Aggregation for Wireless Radio During Low-Power Processor Data Offload via Throughput-Mismatched Interface", Technical Disclosure Commons, ()
https://www.tdcommons.org/dpubs_series/10942