Abstract
Modern high‑performance integrated circuits frequently experience localized dynamic voltage drop hotspots due to accumulated peak currents in congested layout regions. Traditional post‑route power grid augmentation approaches may encounter limitations due to routing blockages and a lack of available placement sites. The disclosed method provides a track‑aware standard cell repositioning technique that treats a post‑route layout database as a primary constraint and standard cell locations as adjustable variables. A computing device executing a dynamic programming algorithm scans lower‑level metal tracks to identify continuous vertical routing corridors. It then calculates localized standard cell displacements to accommodate the insertion of new power grid shunts. This automated approach addresses localized voltage drop hotspots while maintaining physical spacing rules and signal timing.
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Recommended Citation
Pendyala, Prateek and Gotra, Vishant, "Dynamic Programming For Post‑Route Power Delivery Network Augmentation", Technical Disclosure Commons, ()
https://www.tdcommons.org/dpubs_series/10302