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Digital ASICS (application specific Integrated circuit) and SOCs (System on chip) are used as primary

centers of compute and processing in multitude of electronic devices including mobile phones,

notebooks and tablets. These ASICs/SOCs have a complex architecture of processing blocks that are

configured in the master/slave configuration where multiple masters can request resources and or

processing from a single/multiple slave block. When this happens, there are contention issues for

resource and bandwidth at the slave end. To make sure each master gets the quality of service from the

slave, QOS sideband signals are transmitted over the connecting bus from master to slave. These signals

are then used for arbitration and prioritization of requests on the salve side.

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