A multi-chip package has a number of processor cores or integrated circuits (ICs). To optimize performance and power consumption, different ICs can be operated at different voltages and frequencies (dynamic voltage and frequency scaling, or DVFS). DVFS is enabled by the presence of independently regulated power rails supplying an IC or a group of ICs. However, distinct power rails within a multi-chip package result in a fragmented power delivery network (PDN), which in turn causes large voltage drops that compromise performance and reliability. Per the techniques of this disclosure, critical power rails, which are relatively few in number, are distributed globally, e.g., throughout the package. Less critical, or local, power rails switch to one of the global power rails depending on voltage level appropriate to the local power rail. The techniques result in DVFS with lowered cost and a more robust PDN with smaller voltage drops, better performance, and higher reliability.

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This work is licensed under a Creative Commons Attribution 4.0 License.